Future ESD Protection Outlook

The electrostatic discharge (ESD) induced design overhead problem rapidly becomes more and more unacceptable to large and complex ICs designed in advanced IC technologies. This chapter discusses some disruptive ESD protection concepts to potentially overcome the ESD‐induced design overhead problem inherent to traditional in‐Si PN‐junction‐based ESD protection solutions that have been widely used for decades. One fundamental ESD protection problem is that almost all ESD protection solutions utilize in‐Si PN‐junction‐based active devices to discharge ESD transients. ESD metal interconnects have been a design challenge because wide metals are needed to carry out large ESD currents, which produce significant amount of ESD‐metal‐induced capacitance that is becoming increasingly unacceptable to advanced ICs. The concepts of above‐IC nano‐crossbar array ESD switches and graphene nano‐electromechanical system ESD switches, as well as graphene ESD interconnects are all encouraging trials in the right direction for future ESD protection.