Excellent Static and Dynamic Scaling of Power Handling Capability of the BaSIC(DMM) Topology with 1.2 kV SiC Power MOSFETs

Enhanced short-circuit (SC) withstand capability for SiC Power MOSFETs has been recently achieved using the BaSIC(DMM) topology which employs a Gate-Source-Shorted Si Depletion Mode MOSFET (GSS Si DMM) in series with the source of the SiC Power MOSFET. This approach increases SC withstand capability with minimal impact on on-resistance and switching losses. In this paper, it is demonstrated for the first time that the Composite MOSFETs created within the BaSIC(DMM) Topology can be paralleled to increase current and power handling capability while maintaining good SC withstand capability. Experimental results on scaling the power were obtained using Composite MOSFET made with 1.2 kV 280 mΩ SiC Power MOSFETs and 100 V 64 mΩ Si DMM devices. Excellent linearity of current scaling and SC capability was experimentally achieved with 2, 3 and 4 paralleled composite MOSFETs.