A Ka-Band Watt-Level High-Efficiency Integrated Doherty Power Amplifier in GaAs Technology

This paper presents a Ka-band two-stage watt-level high-efficiency Doherty power amplifier (DPA) in the 90 nm GaAs pseudomorphic high-electron mobility transistor (pHEMT) technology. A reversed uneven input power drive is adopted to deliver more power to the carrier amplifier in the DPA to enhance the higher efficiency and gain. In addition, a co-design Doherty output combining network based on the load-pull-based technique is developed to enable the impedance inversion network in the carrier amplifier and the parasitic compensation to be integrated in a single compact network. In this case, the loss in the DPA output network can be minimized to achieve a high-efficiency DPA. For verification, the fabricated DPA exhibits a measured saturation output power of 30.02 dBm and a small signal gain of 17.7 dB, with an associated 37.9% peak power added efficiency (PAE) and 30.2% PAE at the 6-dB power back-off (PBO) at 28 GHz, respectively. Moreover, under the modulated signal excitation with a 20-MHz 64-quadratic-amplitude modulation (QAM) signal with the 7.2-dB peak to average power ratio (PAPR), the DPA achieves an adjacent channel leakage ratio (ACLR) of −30.63 dBc without the digital predistortion (DPD), and −46.59 dBc with the DPD. The area of the proposed DPA is $2.9\ \text{mm} \times 2.0\ \text{mm}$ including pads.