FPGA-Based Approximate Multiplier for Efficient Neural Computation

Neural networks are nowadays widely used in many fields of applications to provide better services. However, as neural networks are computation intensive, specialized hardware acceleration is needed. To make neural network computation applicable to consumer electronic devices, in this paper, field programmable gate array (FPGA) based approximate multipliers are proposed. The proposed architectures are designed based on the Karatsuba multiplication algorithm. Approximate computing method is introduced to further reduce resource and energy consumption. Two architectures are proposed where approximate computing is applied to lower order part and middle part of the multiplier, respectively. The proposed architectures are implemented in Xilinx Zynq Ultra-scale+ device and up to 36% energy efficiency improvement is achieved. The proposed multipliers are applied in neural network computation and significant efficiency can be achieved with negligible accuracy degradation.