Input Arbiter for Router Allocator in MPP Computers with Double-loop Hypercube Network Topology

Routers are essential for achieving high performance and low latency in the data transfer between processor chips on nodes in parallel computers. Arbiters are the main building blocks in the router allocators used in the interconnection networks of MPP computers. A solution of input arbiter which can be used in the structure of router allocators with minimal adaptive routing and cut-through flow-control is presented. The use of asynchronous arbitration with fast result formation reduces the operating time of the allocator and increases the speed of packet transfer through the interconnection network of MPP computers.