Performances and Trade-offs of Low-Bit Precision Neural Networks based on Resistive Memories

In this work we devise and train a RRAM-based low-precision neural network with binary weights and 4-bits activations. Full-circuit simulations including the analog neuron peripheral circuitry are run in different conditions, including the effect of RRAM devices nonidealities, to evaluate the reliability and performance of the network when executing a classification task. Results show that the power-throughput trade-off during inference is governed by the neuron circuitry, and that the reset conditions can be tuned to simultaneously maximize energy efficiency and accuracy leading to improved network reliability. Accuracy losses are found to be dominated by the variability of the RRAMs in low resistive state (LRS), which suggests specific strategies for accuracy loss minimization. The network shows excellent performance in terms of accuracy, throughput, and energy efficiency, with robustness to RRAM non-idealities.