Single Phase Nine-Level Symmetrical Inverter Topology with Reduced Switch Count and Total Standing Voltage

An improved symmetrical MLI topology capable of producing nine-level output utilizing seven switches (10 IGBTs) has been proposed. The proposed fundamental unit uses three voltage sources of the same magnitude and two self-balancing capacitors. The main features are fewer semiconductor devices with less voltage stress across them and reduced total standing voltage. Moreover, a generalized cascaded structure to generate more levels has also been discussed. Circuit performance is evaluated under static and dynamic load conditions. Switches pulses are generated using the nearest level control switching technique to reduce the total harmonic distortion. Comparison with other similar topologies has been accomplished in the paper to show the advantages of the proposed topology. The analysis found that the topology uses minimum switches and has a Total standing voltage per unit (TSV
pu
) value of 3.25, much lower than the compared topologies. Also, less component count and the symmetrical nature of the dc-sources make the proposed topology suitable for solar PV applications.