High Frame Rate High Linearity Low Power DROIC for 30μm-Pitch Cryogenic Infrared FPAs

This paper presents a pixel circuit with high frame rate, high linearity, and low power consumption. This pixel circuit is applied in a digital readout integrated circuit (DROIC) of 320×256 infrared focal plane array(IRFPA). The proposed single slope ADC is deployed in the proposed pixel circuit, which improves linearity and power consumption of the DROIC. The proposed pixel circuit is fabricated using 180nm 1P5M CMOS process with 30μm pixel pitch. Pixel power consumption is 406nW. Frame rate of the proposed DROIC is 1KHz. Nonlinearity of the quantization is lower than 0.8%.