A Charge Pump with Perfect Current Matching Applied to Phase-Locked Loop in 65nm CMOS

A source-switched charge pump (CP) with low current mismatch used in phase-locked loop (PLL) is presented in this paper. Up and down current mismatch is detected by two current detection circuits and cancelled by add-on current mirrors. Considering the channel-length modulation effect impact in the current mirror transistors, two dynamic current compensation circuits are introduced. The concept of the improved CP is implemented in a 65nm CMOS technology. With 50 µA output current, the circuit achieves less than 0.78% current mismatch over the output voltage range from 0.21 to 1.62 V under 1.8 V supply.