Bayesian Optimization of PCB-Integrated Field Grading for a High-Density 10 kV SiC Power Module Interface

An automated numerical optimization workflow using Bayesian optimization and a novel weighted point-of-interest (POI) cost function is proposed and demonstrated for PCB-integrated electric field grading structures. The traditional manual design techniques for high-density insulation systems involve simulating the electric field performance and manually assessing the performance characteristics, iterating until an acceptable design is achieved. The proposed technique improves on this by allowing for a fully automated workflow, based on a scalable, computationally efficient cost function that is readily implemented in commercial software and finite element method (FEM) packages. The workflow is demonstrated on PCB-integrated field grading structures, which are employed to alleviate field crowding, and improve field uniformity around the terminals of a high-density 10 kV SiC mosfet power module. The integrated field grading, in conjunction with the module housing, enables a power terminal spacing of 6 mm, while ensuring partial discharge (PD) free operation of the module. The proposed workflow accelerates design time by a factor of three when compared with a competing descent-based technique, and by a factor of 100 when compared with manual design techniques, with seven times lower convergence error. In addition, the optimized system performed 38% better than the previous manually designed version, experimentally demonstrating a PD inception voltage of 11.6 kV rms (16.4 kV peak). The proposed workflow is scalable to larger systems, making it applicable to a broad range of high-density, high-voltage insulation design problems.