An Energy Efficient Hybrid FEC-ARQ Communication Scheme for Small Satellite Applications

With the extensive cost reductions associated with small satellites, low Earth orbit missions are increasingly becoming popular, mostly with universities and the New-Space industry. However, a persistent limitation associated with the smallest satellites is the significant reduction in energy resources that each satellite has at its disposal. This limitation poses a challenge when using advanced communication systems, particularly those employing advanced forward error correction such as low-density parity check (LDPC) codes. To conserve the high computational energy required to decode such codes, we propose a novel early termination stopping criterion for LDPC decoders that is based on detecting the periodicity of syndrome weight oscillations. The technique is independent of the operating signal-to-noise ratio and results in reductions better than 80%, in the computational energy expended on a well-known bit-flipping decoding algorithm. Real world results are presented using an ARM-based microcontroller.