Investigation on the copper void defect by Transmission Electron Microscope (TEM)

Dual-damascene copper metallization has been the mainstream technology of forming interconnections for IC devices. Defect formation during Cu metallization is one of main yield-limiting factors in IC manufacturing. In this work, we consolidate several Cu void defect case studies and investigated root-cause of defect formation which are related to the environmental change and manufacturing processes such as etch, clean, electroplating and chemical polishing steps. Detailed TEM analysis was performed on the defect structure and elements of the Cu voids by using various TEM FA techniques including EDX and EELS. It was found out that there are various root causes of Cu voids formation: [post-via etch/clean step; barrier oxidation during barrier deposition; polymer block Cu liner; Sulphur induced corrosion; IMD peeling block Cu metal deposition]. We demonstrated the importance of the selection of suitable TEM FA techniques for the root cause understanding of Cu voids formation.