The Failure Mechansim of the E-SOA Boundary of Power Transistor Collapsed at Higher Gate Voltage

The ID-VD curves of the power transistor for the boundary extraction of the electrical safe-operating area (E-SOA) are often measured by the hundred-nanosecond pulse (TLP) to differentiate it from the thermal SOA. However, the E-SOA boundary collapse at the low gate voltage is still caused by the thermal. It is the Joule-heating lowering the turn-on threshold voltage of bipolar as temperature increases. For the high gate voltage, the E-SOA boundary collapse is caused by the TLP induced magnetic-field at the transistor turn-on transient, which leads to the current crowding effect as well as source-drain short effect. From the electromagnetic simulations, the two effects are demonstrated as the electrons of the channels exerted by the Lozentz force flow outside the channels to fill whole regions of the finger edges of transistor under the time-varying magnetic field created by the time-varying current.