Building a post-layout simulation performance model with global mapping model fusion technique

Building a post-layout simulation performance model is essential in closing the loop of analog circuits, but it is a challenging task because of the high-dimensional space and expensive simulation cost. To facilitate efficient modeling, this paper proposes a Global Mapping Model Fusion (GMMF) technique. The key idea of GMMF is to reuse the schematic-level model trained by the Artificial Neural Network (ANN) algorithm, and combine it with few mapping coefficients to build the post-simulation model. Furthermore, as an efficient global optimization algorithm, differential evolution is applied to determine the optimal mapping coefficients with few samples. In GMMF, only a small number of mapping coefficients are unknown, so the number of post-layout samples needed is significantly reduced. To enhance practical utility of the proposed GMMF technique, two specific mapping relations, i.e., linear or weakly no-linear and nonlinear, are carefully considered in this paper. We conduct experiments on two topologies of two-stage operational amplifier and comparator in different commercial processes. All the simulation data for modeling are obtained from a parametric design framework. A more than 5× runtime speedup is achieved over ANN without surrendering any accuracy.