Frame-Level Intermodular Configuration Scrubbing of On-Detector FPGAs for the ARICH at Belle II

On-detector digital electronics in high-energy physics (HEP) experiments is increasingly being implemented by means of static random access memory (SRAM)-based field programmable gate arrays (FPGAs), due to their reconfigurability, fast data processing, and transfer. Radiation-induced single-event upsets (SEUs) in the configuration hinder the correct operation, since they may alter the programmed routing paths and logic functions. In most data acquisition systems, data from clustered front-end modules are aggregated by a single board, which then transmits data to off-detector electronics for acquisition and triggering. In this work, we present a novel scrubber capable of correcting radiation-induced upsets in the configuration of SRAM-based FPGAs by majority voting across clustered modules. We designed it for the Aerogel Ring Imaging CHerenkov (ARICH) counter of the Belle II experiment at the KEK Laboratory, Tsukuba, Japan. We discuss the architecture of the system and its implementation in a Virtex-5 FPGA, in the aggregator board, for correcting the configuration of up to six Spartan-6 LX45 FPGAs, on pertaining front-end modules. We discuss results from neutron irradiation tests at the TRIGA reactor of the Jožef Stefan Institute, Ljubljana, Slovenia, which show that our solution corrects an average of 6.2 k upsets in each target FPGA before the failure of the scrubber. Moreover, with respect to the Xilinx soft error mitigation (SEM) controller, our design improved the mean time before failure of data readout by 30%.