High-Frequency Damping Analysis and Compensation Method Above Half PWM Sampling Frequency for Train Grid-Connected Converter

There are serious harmonic overvoltage phenomena in the electric railway system caused by the high-frequency resonance or instability issues, which is rooted in the region not only below but also above half the PWM sampling frequency. To effectively evaluate the high-frequency admittance of the train and further suppress the harmful high-frequency instability issue, a multifrequency averaging model combining sampling sideband components is developed. Compared with the single-frequency model, the multifrequency model is more accurate in the region near sampling frequency. After simplification, it is found that the time delay of the digital control system is the cause of high-frequency negative damping. However, the time delay may make the traditional virtual impedance method fail in the high-frequency domain. Therefore, a virtual impedance controller (VIC) with variable damping characteristics is proposed to reshape the train admittance. The proposed VIC has the same structure as PID control. The detailed design method is given to offset the influence of time delay. The multiple high-frequency negative damping regions of the train can be eliminated simultaneously by using multiple parallel VICs. The proposed method is applicable when changing the switching frequency. Hardware-in-the-loop tests and low-power physical experiments validate the effectiveness of the proposed VIC strategy.