The VCU SRC II: a full-custom VLSI 32-bit RISC processor

Heuring and Jordan define a simplified, 32-bit RISC processor instruction set architecture called the simple RISC computer. An extended form of this architecture is defined, a gate-level logic design is developed, and a full-custom VLSI implementation is laid out in a 0.5 /spl mu/m CMOS process, fabricated, and tested. The processor design flow, from ISA definition to IC testing, is carried out by junior- and senior-level undergraduate engineering students over two consecutive semesters as part of an integrated curriculum.