A Dual-Mode W-Band Eight-Way Parallel–Series Power-Combining PA With +18-dBm Psat and 15.1% PAE in 65-nm CMOS Technology

This letter presents the design of a Dual-mode
$W$
-band eight-way power-combining power amplifier (PA) implemented in Taiwan Semiconductor Manufacturing Company (TSMC) 65-nm CMOS technology (
$f_{t} / f_{\mathrm {max}}$
: 210 GHz/240 GHz). A configurable parallel–series-based eight-way power combine technique is proposed to achieve high output power with high power efficiency near half of
$f_{t}$
. The eight-way power-combiner is consisted of two transformer-based parallel two-way differential combiners and a coupled-line-based series combiner to achieve high passive efficiency and compact layout. The proposed PA achieves a measured peak gain of 30.9 dB with a bandwidth (BW) of 7.5 GHz. The PA has
$P_{\mathrm {sat}}$
of +18 dBm with an 1dB output compression point (OP1dB) of +13.8 dBm and a peak PAE of 15.1% in high-power mode. In the low-power mode (LPM), the measured
$P_{\mathrm {sat}}$
, OP1dB, and peak PAE are +13.6, +9.1 dBm, and 10.3%, respectively. The PAE is enhanced by 3.4% points at a 6-dB back-off in LPM. The core area of the proposed PA is 0.3 mm
²
.