Design and Development of Pipelined Computational Unit for High-Speed Processors

Microprocessors are regarded as the “heart” of an operating system. Arithmetic and Logical Unit (ALU) plays a crucial role in microprocessors, taking care of all critical tasks. Thus, considering the varied applications of the microprocessor, the security of the data and the operations performed by the microprocessor is critical. Field Programmable Gate Array (FPGA) stands in its outstanding capability due to its field re-programmability unlike the semi-custom and full-custom designs. It has also has the capabilities of parallel processing, and its ability to process data high speeds due to its high clocking frequencies. Thus, FPGA can be a fruitful prototyping agent for Microprocessors. In this work, a lightweight pipelined computational unit (ALU), an important part of the microprocessor, has been realised on Intel Cyclone V FPGA using Verilog HDL. The lightweight computational unit also includes an optional lightweight S-Box that can provide adequate non-linearity and security to the data. Also, a custom testbench has been designed for functional verification. The optimised design occupies 515 logic elements and dissipates 199.75 mW of power when including the memory. Further, it takes four clocks as an accumulation period to initialise the pipeline and produces the computational results for every subsequent instruction at the same clock instant.