Analysis of Continuous-Time SD-modulator With Single-Bit Quantizer Operating at Limit Cycle

Limit cycle mode is an underdeveloped concept that promises certain benefits like jitter immunity and reduction of power per conversion bandwidth in continuous time Sigma-Delta Modulators. In this paper an analysis of the limit cycle mode will be conducted and synthesis method will be showcased. The synth esis includes the out-of-band gain theory and the describing functions method to derive the mathematical description of the system. A numerical example is provided to showcase the entire procedure.