Implementation of Lower and Upper Approximation features of rough set theory on FPGA

Many analysts have proposed usage of Rough Set Theory on hard-ware level however not every one of them have built a RTL code for it. Rough set algorithms have been demonstrating their significance in the fields of artificial intelligence, medicine, mining, machine learning, and military purpose and etc. so having a dedicated hardware for rough set theory can save time and energy. This paper mainly focused on writing RTL for the implementation of rough set theory and used this RTL code for obtaining lower and upper approximation features of rough set theory.