Effect of Statistical Dopant Fluctuations on Threshold Voltage of Emerging Devices

This paper presents a comparative study on the effect of statistical dopant fluctuations on threshold voltage (
$V_{th}$
) of emerging and conventional metal-oxide-semiconductor (MOS) field-effect (FET) transistors (MOSFETs). In this context, three
${n}$
-channel MOSFET structures representing three different complementary MOS (CMOS) technologies at the 20 nm node are considered. The structures represent a conventional device with symmetric halo or pocket regions around the
$n^{+}$
source-drain formed by a single
${p}$
-type dopant implantation; a second conventional device with symmetric
${p}$
-type halo regions around the
$n^{+}$
source-drain formed by multiple
${p}$
-type dopant implantations; and an emerging epitaxial-channel device with symmetric
${p}$
-type halo regions around the
$n^{+}$
source-drain where the halo regions are formed by up-diffusion of multiple
${p}$
-type buried layers from the bulk-substrate during epitaxy. For these devices, the values of
$V_{th}$
variance and mismatch are computed as a function of device dimensions. The results show that the multiple-halo devices, in general, offer significantly lower
$V_{th}$
variance and mismatch compared to the conventional single-halo devices whereas, the emerging epitaxial-channel multiple-halo MOSFETs offer the lowest
$V_{th}$
variability compared to the conventional devices at the same technology node. And, the value of the mismatch coefficient for the emerging technology is about 0.68 mV
$\times \mu \text{m}$
compared to that of 1.33 and 1.07 mV
$\times \mu \text{m}$
for the conventional single-halo and multiple-halo technologies, respectively. This study, clearly, demonstrates the benefit of the emerging epitaxial-channel buried-halo MOSFETs in significantly reducing the effect of statistical dopant fluctuations on
$V_{th}$
at the advanced planar CMOS technology nodes.