A High-Accuracy Digital Predistorter Constructed by Reproducing Iterations of ILC with Cascade Architecture

In this paper, a high-accuracy predistorter is proposed for digital predistortion (DPD) linearization of power amplifiers (PAs). This new predistorter is constructed by adopting an on-line cascade architecture to reproduce iterations of iterative learning control (ILC), which is an off-line iterative algorithm used to obtain predistorted-signal samples in the conventional ILC-based DPD. Experiments demonstrate that the proposed DPD method outperforms all the existing typical DPD methods, including indirect learning-based DPD, direct learning-based DPD, and ILC-based DPD.