Sn Concentration Effects on Polycrystalline GeSn Thin Film Transistors

Thin-film transistor (TFT) applications of GeSn have attracted attention as a means of improving the performance of electronic devices. Based on our advanced solid-phase crystallization and TFT process technologies, we comprehensively studied the relationship between the film properties and TFT characteristics of polycrystalline GeSn. The initial Sn concentration
${x}_{\mathrm {i}}$
significantly changed the crystal and electrical properties of the GeSn layer. Excess Sn (
${x}_{\mathrm {i}} \ge 4.5$
%) precipitated in GeSn and degraded its properties, whereas the appropriate amount of Sn effectively passivated defects in Ge and reduced the density of defect-induced acceptors and grain boundary traps while maintaining a high Hall hole mobility (>200 cm
²
V
⁻¹
s
⁻¹
). The performance of the accumulation-mode TFTs fabricated under 400 °C also strongly depended on
$\boldsymbol {x}_{\mathrm {i}}$
, achieving both a high field-effect mobility (170 cm
²
V
⁻¹
s
⁻¹
) and on/off ratio (10
³
) at
${x}_{\mathrm {i}} = 1.6$
%. This performance was shown to be the highest among Ge-based TFTs with grain boundaries in the channel.