An Energy-Efficient 3D Cross-Ring Accelerator With 3D-SRAM Cubes for Hybrid Deep Neural Networks

Hybrid deep neural networks (DNNs) are utilized for various embedded applications and composed of convolution layers, fully connected layers and recurrent layers. However, hybrid-DNNs are difficult to be fully deployed to edge devices due to both memory-intensive and computation-intensive workloads. Additionally, the resource utilization of a hybrid-DNN accelerator is less than those of CNN accelerators according to various computation kernels and dataflows. Fortunately, 3D-SRAM cubes by TSV 3D-stacking technologies provide promising solutions and become feasible for on-device DNN accelerators. In this paper, a flexible interconnect architecture, 3D cross-ring, and an efficient dataflow are proposed with 3D-SRAM cubes for an energy-efficient hybrid-DNN accelerator. Micro-routers of 3D cross-rings are designed to decrease the power of on-chip data movement about
$5\times $
compared to conventional 3D routers. Moreover, the efficient dataflow with dynamic workload distribution is designed based on 3D cross-rings for supporting different NN layers and models. The proposed accelerator can achieve higher than 90% PE utilization and reduce the DRAM accesses about
$6\times $
on different DNN models. This accelerator improves the overall energy efficiency up to
$17.4\times $
on VGG-16 compared to other state-of-art CNN accelerators.