Adaptive Test Bench Generation, Simulation and Parameter Extraction for AMS Circuitry

This paper presents a novel semi-automatic test bench generation and parameter extraction workflow for analogmixed signal circuitry. Specific test benches for a given circuit are automatically generated, simulated, and model parameters are extracted. By relying on a modular test bench structure, changes in the circuit’s design or port list can be automatically considered, facilitating the overall verification process and avoiding errors during the parameter extraction phase. Hence, precise and pinaccurate models can be generated faster and more reliably. A first implementation of this workflow using Cadence’s SKILL language is shown.