Enhancement of thermal fatigue reliability of power semiconductor interconnects using dimple-array solder joints

We present a dimple-array interconnect (DAI) technique that replaces wire bonds for interconnecting a power device with an array of low-profile dimpled solder joints between a stamped metal sheet and the device. Electrical switching test results on the DAI modules showed that this technique has the potential to improve the electrical performance of a packaged power module by reducing parasitic oscillations and voltage overstress on the devices. Our finite-element analysis of thermo-mechanical stresses on the dimpled joints showed that the interconnect technique can improve the thermal fatigue reliability of the joints over those formed by conventional solder bumps.