Nonvolatile NULL Convention Logic Pipeline Using Magnetic Tunnel Junctions

Nowadays, energy is one of the main considerations with the increasing demands for IoTs, wearable-devices, machine learning and artificial intelligence. Asynchronous logic is a viable solution to address the energy issues owing to its advantages of no clock tree, robust circuit operation and avoidance of worst-case timing. NULL Convention Logic (NCL), one of the most popular asynchronous logic paradigms, expresses logic directly and needs minimal delay analysis. However, mainstream CMOS-based NCL still suffers from high static power issue. Spin transfer torque magnetic tunnel junction (STT-MTJ) is a potential device for low-power NCL design with the merits of non-volatility, high speed, nearly zero standby power and 3-D integration capability. In this work, we designed a novel nonvolatile NCL (NV-NCL) pipeline by integrating NCL and STT-MTJ. Compared to traditional NCL pipeline, our proposed NV-NCL pipeline exploits nonvolatile registers (NVRs) to reduce static power consumption. Meanwhile, write completion detector (WCD) was added in NVR to realize self-adaptive writing, further reducing dynamic write power. The behaviors and performance of the proposed NV-NCL pipeline were evaluated by using a 40 nm CMOS process and an in-house developed STT-MTJ model. Finally, parameter optimizations are explored to improve performance in terms of write time (∼5 ns), power consumption (∼0.48 pJ/bit) and reliability.