Measurement of Five-port Power Divider Based on Three-port Vector Network Analyzer

Aiming at the problem that the actual four-way power dividing chip can accommodate up to three ports for on-chip testing at the same time, this paper presents a testing and data processing method for the power divider chip by using three ports of a four-port vector network analyzer (VNA). A four-way power divider circuit is designed in the simulation tool and connected to non-ideal loads to obtain five sets of three-port S-parameter, then they are merged into a five-port S-parameter. Comparing the combined five-port S-parameter with the simulated five-port S-parameter with ideal loads, it is found that the combined four-channel signals’ insertion loss amplitude error is less than 0.2 dB, and the phase error is less than 0.6°, and the combined S-parameter can correctly characterize the amplitude and phase characteristics of the insertion loss of the splitter branch. Because of the load mismatch, the return loss error of the five ports will be relatively larger. Then a VNA is used to test the four-way splitter on-chip, and the obtained three-port S-parameters are combined into a S5P model. Compared with the splitter’s datasheet, the obtained data can correspond to the simulation experiment results.