Implementing a Ternary Inverter Using Dual-Pocket Tunnel Field-Effect Transistors

In this article, we propose a standard ternary inverter (STI) based on a dual-pocket tunnel FET (DP-TFET) for low-power applications. Using 2-D device simulations, we demonstrate that if appropriate doping concentration and length are chosen for the dual-pocket, then the device can exhibit ternary inverter voltage transfer characteristics (VTCs) with three stable output voltage levels. Ternary inverter characteristics are obtained by two tunneling mechanisms in the device: 1) gate bias-independent within-channel tunneling and 2) gate bias-dependent source-channel tunneling. We also demonstrate that the ternary inverter obtained could be operated at different supply voltages by controlling the pocket doping concentration.