ASIC memory design of 2-D median filters

An 8-bit VHDL based 2-D median filter is designed using Mentor Graphic tools. The algorithm is based on sorting pixel samples and extracting their median values. The code was synthesized and optimized for an IC layout using CMOS 2 micron technology. The principal organization of the memory elements to store data that perform two dimensional transpose application is presented. A Matlab program for this algorithm was written, tested, and verified on 400/spl times/400 pixel images.