Cold MRAM as a Density Booster for Embedded NVM in Advanced Technology

With the co-optimization of magnetic tunnel junctions (MTJs) and transistors, high-density 16nm-CMOS-compatible STT-MRAM designed at 77K (Cold MRAM) is proposed in this work to increase the cell density to 5.3× of a 16nm SRAM cell. A higher thermal stability factor (Δ = E
B
/k
B
T) is leveraged to scale MTJs’ size for write current and further reduce the size of the access transistors dominating the cell size. An improved tunneling magnetoresistance ratio (TMR) at 77K also enables a higher read margin for Cold MRAM.