A 0.15mm² Energy-Efficient Single-Ended Capacitance-to-Digital Converter

In this brief, we proposed a small area, high precision, and high energy efficiency single-ended capacitance-to-digital converter (CDC). The circuit incorporates a
$\Delta \Sigma $
CDC and a SAR CDC. The SAR CDC is a coarse CDC which determines the measurement range of capacitance, considering the area consumption, single-ended SAR CDC is adopted. To get a high resolution, inverter-based correlated-double-sampling (CDS) circuit is employed in the
$\Delta \Sigma $
modulation loop. The test chip is fabricated in a 180-nm CMOS process and the core occupies an area of 0.15mm
²
. The circuit achieves an rms resolution of 186aF at a 4pF input capacitor, the power consumption is
$4.1~\mu \text{W}$
in SAR phase with a 100kHz sampling rate and
$23.2~\mu \text{W}$
in
$\Delta \Sigma $
phase with a 400 kHz sampling rate.