Improving flip chip process for large 2.5D molded interposer

The demand for high-performance semiconductor products in line with the development of information technology industry continues to increase. However, fab node shrinkage, which led the development of semiconductor performance in the past, has reached its limit. As a result, the need for multi heterogeneous chip integration technology is rapidly increasing. 2.5D packaging using Si interposer is one of these. The biggest difficulty in the development of 2.5D packaging is to overcome the warpage of multi-chip (including HBM, chiplet, etc.) integrated interposer. The first challenge is improving warpage caused by increase in the size of the interposer. Increasing the number of integrated chips is essential for improving the performance of the 2.5D package. On the other hand, this causes an increase in the size of the interposer, and the warpage increases as well. The second problem is unique warpage shape of the interposer. Unlike the conventional monolithic chip, the 2.5D interposer exhibits a variety of unique warpage shapes depending on the design. So it's not enough to simply reduce the size of the warpage. These problems are limited in overcoming them through material composition and design, so a way to overcome them through process technology is needed. In this study, the warpage behavior of multi-chip integrated interposer was analyzed, and a novel bonding technique which handle highly warped interposer was studied. To prevent non-wetting during bonding process of very highly warped interposer we devised a novel technique which can bond the chips overcoming limit of warpage. The actual measured warpage was 182um that bonding was impossible with conventional mass reflow. To overcome this, continuous loads were applied on the top of the interposer and high activity flux was used to induce stronger solder collapse in the direction of the substrates. As a result, bonding with mass reflow was possible even in interposer with severe warpage.