A Compact, Reconfigurable Receiver for IRNSS/GPS/Galileo/Beidou

This paper presents a compact fully integrated low-IF reconfigurable receiver for satellite navigation systems that use L1, L2, L5, and S frequency bands with 2–4 MHz signal bandwidth. A new wideband input matched balun Low-Noise amplifier (LNA) with noise cancellation is used to avoid external matching. A new DC offset correction circuit is designed in the Variable Gain Amplifier (VGA) to avoid signal saturation. A single fully integrated on-chip Fractional-N Phase-Locked Loop (PLL) is designed to generate the local oscillator (LO) for all the frequency bands. The receiver is fabricated in 65 nm CMOS technology, and it provides a maximum gain of 101 dB with gain dynamic range of 51 dB. It achieves a minimum noise figure of 3.8 dB and an image rejection ratio (IMRR) of 28 dB. It draws a current of 34.2-42 mA from a 1.2 V supply while occupying an active die area of 1.96 mm
²
. The die is packaged in a 32-pin QFN package.