Abstract:
The Fan Out Wafer Level Packaging, widely used in the silicon semiconductor system, is introduced for all-in-one hybrid optical package with small form factor, potentiall...Show MoreMetadata
Abstract:
The Fan Out Wafer Level Packaging, widely used in the silicon semiconductor system, is introduced for all-in-one hybrid optical package with small form factor, potentially higher performance, and expendability to on-board/co-packaged optical interconnections. To prove the new packaging idea, 100GBASE-SR4 standard is targeted in this demonstration.
Date of Conference: 06-10 June 2021
Date Added to IEEE Xplore: 26 July 2021
ISBN Information:
Conference Location: San Francisco, CA, USA