Analysis and Mitigation of Self-Sustained Turn-off Oscillations in SiC JFET Supercascode Circuits

The supercascode configurations demonstrate significant benefits over the monolithic medium voltage SiC MOSFETs in terms of cost, commercial viability and thermal dissipation capability. However, this feature can produce an unexpected phenomenon in power electronics applications called self-sustained oscillation during turn-off. This paper presents a comprehensive root-cause analysis of this behavior in a 6.5 kV - 50 A SiC JFET supercascode circuit. A theoretical analysis is carried out based on a turn-off switching equivalent circuit which facilitates the determination of criteria for self-sustained oscillations. The analysis is verified with a SPICE simulation (LTSpice), which also provides a platform to test the countermeasure to suppress the self-sustained oscillation. Finally, the feasibility of an oscillation suppression method is verified by both simulations and experimental set up.