Active dv/dt Control with Turn-off Gate Resistance Modulation for Voltage Balancing of Series Connected SiC MOSFETs

Stacking devices in series allows to achieve higher blocking voltage in power applications. However, an unequal voltage sharing issue among devices is critical which may lead to failure of the devices. The unbalance can be caused by different device characteristics and mismatch of gate signals due to different parasitic components of circuits. In this paper, a dv/dt control method with the active gate driver (AGD) is proposed for voltage balancing of stacked SiC MOSFETs. The dv/dt is actively controlled by modulating the turn-off gate resistance (R
off
) during turn-off transient. The proposed method is experimentally validated by achieving voltage balancing with six series connected SiC MOSFETs at 3 kV dc voltage.