Event-Triggered Ripple-Emulated Digital Hysteresis Current Control Architectures in DC-DC Converters

This paper proposes fully digital hysteresis current control (HCC) architectures for hardware and software con-trolled high frequency DC-DC converters using event-triggered sampling. In the proposed architectures, the output voltage is sampled once in a switching cycle, and the inductor current is sampled once in individual switch states in synchronism with the switching events. Thus a time-multiplexed pipeline ADC is sufficient for high frequency implementation. Current ripples are emulated inside a digital platform without using the information of system parameters and input voltage. Compared to existing analog and mixed-signal HCC methods, the proposed solutions are (i) robust and insensitive to switching noises of current sensors, (ii) resource-aware and power-efficient with (iii) in-built all digital PLL for frequency regulation, and (iv) do not require analog comparators. Steady-state behavior and current loop stability analysis are presented along with small-signal based compensator design. Theoretical predictions are validated using simulated and experimental case studies for a boost converter, and the key performance benefits are highlighted. The proposed digital HCC techniques will be useful for digitally controlled high frequency DC-DC converters.