FPGA-Based Acceleration of THz SAR Imaging

Terahertz (THz) Synthetic Aperture Radar (SAR) is an emerging domain as it provides high spatial resolution in the range of sub-mm compared to the conventional lower frequency spectrum SAR. Despite the limited propagation range at the THz spectrum, it is suitable for short-range applications. One primary potential application could be unmanned aerial vehicle (UAV) based THz SAR for environment mapping and profiling. To address real-time mapping/profiling, a Field-Programmable Gate Array (FPGA) based signal processing platform seems to be promising. Firstly, due to energy efficiency in comparison to CPU and GPU. Secondly, it provides massive parallelism data processing. Therefore, in this paper, a hardware-accelerated 2D THz SAR imaging is presented. The time-domain image reconstruction algorithm Backprojection is implemented using hardware description language (HDL) for the FPGA platform and in consideration of measured data for the 220-330 GHz spectrum. Further, the paper presents the estimation of accuracy in comparison to CPU-based results and hardware resource utilization. Besides, the analysis on execution time and speed-up is provided. The proposed SAR imaging accelerator is implemented and evaluated on Xilinx Zynq Ultrascale+ ZCU102 FPGA board.