Level up in verification: learning from functional snapshots

Increasing demand for electronic circuits raised new challenges for companies in this field. The development time became a key point in gaining market share. Under this circumstances, employment of machine learning techniques in functional verification, the most time-consuming step of front-end integrated circuits development, is more and more adopted. Because of diverse working flows inside different companies, each industrial entity needs to develop a personalized data pre-processing flow which must be robust, flexible, highly automated and reusable. This paper emphases opportunity of using classification tasks as a helper to reach functional verification targets with fewer human effort and good accuracy. Efficiency of proposed methods is further analyzed using different metrics, and correlations between real verification tasks and algorithms which can help to accomplish them are presented. To prove the efficiency of proposed machine learning based approaches, UART transmissions affected by baud rates issues are used as a case study.