Design and Implementation of High Speed Serial Interface Based on GTY

With the continuous development of optical communication, the transmission rate and bandwidth of optical fiber signals are also increasing. The acquisition system with single-chip ADC and FPGA can no longer meet the needs of high speed and large bandwidth. Therefore, this paper proposes a high-speed serial interface that combines 4 ADCs with a sampling rate of 40Gsps and a precision of 8bit, and two high-performance FPGAs sample and store 100G multi-system optical signals. Through loopback and clock recovery tests, the expected collection effect is achieved. It has laid a good foundation for the process of adapting to equalization and encoding and decoding.