MBIST-supported Trim Adjustment to Compensate Thermal Behavior of MRAM

Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) is one of the most promising candidates to replace conventional embedded memory such as Static RAM and Dynamic RAM. However, due to the small on/off ratio of MRAM cells, process variations may reduce the operating margin of a chip. Reference trimming was suggested as one of the ways to reduce variation impact to the chip. In addition to process variation, thermal variations reduce the operating margin of STT-MRAM even further and impose a tighter limit on the operating temperature range than CMOS technology. Defects that relate to marginal thermally behavior are especially difficult, because it is very costly to test across the entire operating temperature range at the tester, and can even reduce the lifetime of the chip. Therefore, we propose a Memory Built-in Self Test (MBIST) supported screening method to accurately predict the failure behavior of a device under test at high temperatures solely from lower temperature test. By adding five more BIST runs at 85°C, we are able to predict MRAM failures at 125°C with 99.11% accuracy. This prediction can then be used to define a reference trim adjust value to optimize the read operation across the entire operating temperature range of the MRAM.