Novel LDMOS With Integrated Triple Direction High-k Gate and Field Dielectrics

This article presents a novel lateral double-diffused metal oxide semiconductor (LDMOS) with integrated triple direction high-
${k}$
gate and field dielectrics (HKGF LDMOS). The main feature of the novel HKGF LDMOS is that the top silicon layer is etched to several pillars, and each pillar is surrounded by the high-
${k}$
dielectric from top and two sides. First, the triple direction high-
${k}$
dielectric surrounding the channel forms the high-
${k}$
metal gate structure together with the triple direction metal gate, which decreases the specific ON-resistance (
${R}_{ \mathrm{\scriptscriptstyle ON},{\mathrm {sp}}}$
) and threshold voltage (
${V}_{TH}$
) due to the increasing gate dielectric capacitance. Meanwhile, the triple direction gate structure broadens the channel width without enlarging device size, thus increasing the transconductance (
${g}_{m}$
) and further decreasing the
${R}_{ \mathrm{\scriptscriptstyle ON},{\mathrm {sp}}}$
. Second, the triple direction high-
${k}$
dielectric surrounding the drift region has strong modulation effect on the electric field and assistant depletion effect on the drift region, leading to the increasing of the breakdown voltage (BV) and decreasing of the
${R}_{ \mathrm{\scriptscriptstyle ON},{\mathrm {sp}}}$
. The simulation results indicate that when comparing with the conventional LDMOS, the proposed HKGF LDMOS not only decreases the
${V}_{TH}$
by 72.7% and
${R}_{ \mathrm{\scriptscriptstyle ON},{\mathrm {sp}}}$
by 48.1%, but also increases the
${g}_{m}$
and BV by 188.2% and 157.6%, respectively.