A Clock Generation Module Covering 500MHz to 12GHz for Sub-6GHz 5G Wireless Communication

A clock generation module, consisting of two voltage controlled oscillators (VCO) and two triplers, is proposed. As one of the most critical components in sub-6GHz 5G wireless transceivers [1], the clock generation circuit is required to have wide tuning range and low phase noise. The key design details of the module including VCO and tripler are discussed. Two techniques are adopted to improve the performance of the self-mixing tripler. The first technique is to use triple stacked structure to reuse current and reduce power consumption and area; the second is to use a 90° phase difference delay locked loop (DLL) to suppress the output fundamental component. The clock generation module has been fabricated in a 28nm process and partially verified by measurements. According to the simulation and measurement results, the clock generation module can cover the frequency range from 500MHz to 12GHz. The phase noise of the high band VCO is -128 dBc/Hz at 1MHz offset at max frequency with a FOM of 188dB; The average output power of tripler is 1dBm and the output range is from 4.5GHz to 12.6GHz. The clock generation module can meet the requirement of sub-6GHz 5G wireless application.