Flicker Noise Analysis on Chopper Amplifier

This paper aims to maximize the performance of the chopper amplifier, considering the design trade-off between noise and power consumption. To achieve the goal, we identify and model the various sources of flicker noise in the amplifier and switches using Verilog-AMS language. Then, we build a chopper amplifier circuit and investigate the influences of chopping frequency, the type of switches (N-type switch, N-type switch with dummy, transmission gate, and bootstrapped N-type switch) and its non-idealities on its noise performance. Based on our analytical study with simulation results using the circuit model, we can identify the optimal chopping frequency and use N-type switches to minimize mismatch in parasitic capacitance. Therefore, we can reduce the total input-referred-noise by 4.9× compared with an amplifier without using the chopping technique.