Automated Recognition of Wafer Backside Image Based on a Hierarchical Model

As design rule shrinkage, the defect size control gets tighter, especially different wafer backside defects start to impact the front side pattern defined and cause yield loss. A hierarchical model has been proposed for recognizing abnormal images of wafer backside automatically, based on a neural-network model, which consists of two modules. The first module, called as Preprocessing Module (PM), will filter the noise and enhance the abnormal defect patterns in the images. Then, the images treated at the first module will be classified by the second Retrieval Module (RM) with an unsupervised autoencoder and K-Nearest Neighbor. In terms of the higher accuracy and efficiency, the results of this practical study with real world data showed the viability compared to the time-consuming and subjective eyeball analysis of backside images.