A 340-nA-Quiescent 80-mA-Load 0.02-fs-FOM Active-Capacitor-Based Low-Dropout Regulator in Standard 0.18-μm CMOS

This letter presents a new low-dropout regulator (LDO) architecture based on an active capacitor. The active capacitor located at the LDO output helps reduce both output variation and settling time under load step changes without using any passive capacitor. A transient-enhanced control loop is also established to further improve the transient performances and significantly lower the quiescent current. Implemented in a standard 180-nm CMOS process, the proposed LDO only consumes a no-load quiescent current of 340 nA to support a maximum load of 80 mA. With only a 3-pF compensation capacitor, the proposed LDO is stable over a wide range of the capacitive load from 0 to 600 pF. The proposed LDO also demonstrates a fast transient response to a 79.9-mA/100-ns load step with the settling time of 110 ns and a voltage droop of 120 mV. Compared to the prior art, this work achieves the best transient FOM of 0.02 fs.