2-8 GHz LNA with 21-dB Gain & Wideband Input Matching using 90-nm CMOS for Radar Applications

In this paper, a high gain LNA with low power consumption & wideband input matching suitable for 2-8 GHz based on 90 nm CMOS technology is implemented. This LNA consists of three stages. The first stage is designed using RC network to achieve input matching over wide-band. The next stage is complementary push pull configuration which is biased accordingly to give a higher linearity and a low noise figure of 2.2 dB. The final stage is CS stage which provides a high peak gain of 21 dB. Both input and output return losses are below - 10 dB. Also, the 1-dB compression point is -20 dBm and intercept point (IIP3) is -2.1 dBm respectively. The presented design has a power dissipation of 3.8 mW only.