A 38.6-fJ/Conv.-Step Inverter-Based Continuous-Time Bandpass ΔΣ ADC in 28 nm Using Asynchronous SAR Quantizer

We propose a self-biased inverter-based amplifier for realizing a high-speed low-power second-order single-loop continuous-time bandpass delta-sigma modulator (CT-BP- ΔΣM). The design is amenable to nanoscale CMOS and exploits a single self-biased pseudo-differential inverter with a positive feedback to replace conventional op-amps used in an integrator configuration. The modulator also uses a 5-bit asynchronous successive approximation register (ASAR) quantizer. With a 30 MHz bandwidth at 400 MS/s sampling rate and 100 MHz intermediate frequency (IF), the modulator achieves 61 dB dynamic range (DR) and 58 dB SNDR while consuming 2.5 mW from a 1V supply. The core area in 28 nm LP CMOS is 0.04 mm
²
. A 38.6 fJ/conv.-step figure of merit is achieved.